On Reconfiguration Latency in Fault-Tolerant Syst ems1

Digital computers embedded in critical applications such as flight controls should be equipped with appropriate fault-tolerance schemes to ensure their reliable and safe operation in the presence of component failures. System reconfiguration, which enhances reliability by dynamically using spatial redundancy, is generally the most time-consuming faul t/errorhandling stage. The reconfigurutzon latency, defined as the time taken for reconfiguring a system upon failure detection or mode change, depends on many parameters, including the size of application programs and data, the CPU and memory speed, built-in testing capabilities, the type (cold, warm, or hot) of spares to use, the system architecture, and the reconfiguration strategy used. In this paper, we classify the reconfiguration techniques into four types: reconfigurable duplication, reconfigurable N-Modular Redundancy (NMR), backup sparing, and graceful degradation. For each type of reconfiguration, we ( i ) evaluate the reconfiguration latency by using several parameters accounting for the aforementioned parameters, and (ii) determine if this type of reconfiguration can meet the application required latency. Index Terms Reconfiguration latency, dynamic redundancy, processor and task parameters, backup sparing, graceful degradation, cold, warm, and hot spares 'The work reported was supported in part by a Texas Instruments Grant, the Office of Naval Research under Grant N00014-91-J-1115 and by the NASA under Grant NAG-1-1120. Any opinions, findings. and conclusions or recommendations expressed in this paper are those of the authors and do not necessarily reflect the view of the funding agencies. 0-7803-24734/95/$4.00 e 1995 IEEE 287